WIP

Author: Grarak

src/jit/analyzer/asm_analyzer.rs

@@ -18,14 +18,17 @@ fn is_idle_loop(insts: &[InstInfo]) -> bool {
     let mut regs_disallowed_to_write = RegReserve::new();
     for (i, inst) in insts.iter().enumerate() {
         if (inst.is_branch() && i < insts.len() - 1)
-            || matches!(inst.op, Op::Swi | Op::SwiT | Op::Mcr | Op::Mrc | Op::MrsRc | Op::MrsRs | Op::MsrIc | Op::MsrIs | Op::MsrRc | Op::MsrRs)
+            || matches!(
+                inst.op,
+                Op::Swi | Op::SwiT | Op::Mcr | Op::Mrc | Op::MrsRc | Op::MrsRs | Op::MsrIc | Op::MsrIs | Op::MsrRc | Op::MsrRs | Op::Swp | Op::Swpb
+            )
             || inst.op.is_write_mem_transfer()
         {
             return false;
         }
 
-        let src_regs = inst.src_regs & !reg_reserve!(Reg::PC);
-        let out_regs = inst.out_regs & !reg_reserve!(Reg::PC);
+        let src_regs = inst.src_regs - reg_reserve!(Reg::PC, Reg::CPSR);
+        let out_regs = inst.out_regs - reg_reserve!(Reg::PC);
         regs_disallowed_to_write |= src_regs & !regs_written_to;
 
         if !(out_regs & regs_disallowed_to_write).is_empty() {

src/jit/emitter/emit.rs

@@ -140,9 +140,9 @@ impl<const CPU: CpuType> JitAsm<'_, CPU> {
             let inst = &self.jit_buf.insts[i];
             debug_println!("{:x}: block {basic_block_index}: emit {inst:?}", block_asm.current_pc);
 
-            // if block_asm.current_pc == 0x20076d4 {
-            //     block_asm.bkpt1(0);
-            // }
+            if block_asm.current_pc == 0x2001344 {
+                block_asm.bkpt1(0);
+            }
 
             let mut label = Label::new();
             let needs_cond_jump = !matches!(inst.op, Op::Clz | Op::Qadd | Op::Qsub | Op::Qdadd | Op::Qdsub) && !inst.op.is_alu() && !inst.op.is_mul();

src/jit/emitter/emit_transfer.rs

@@ -132,7 +132,7 @@ impl<const CPU: CpuType> JitAsm<'_, CPU> {
         block_asm.nop0();
 
         let block_offset = block_asm.guest_inst_metadata(self.jit_buf.insts_cycle_counts[inst_index], inst, RegReserve::new()) as u32;
-        block_asm.mov4(FlagsUpdate_DontCare, Cond::AL, Reg::R12, &block_offset.into());
+        block_asm.mov2(Reg::R12, &block_offset.into());
 
         self.emit_fast_single_transfer(size, transfer.signed(), inst.op.is_write_mem_transfer(), block_asm);
 
@@ -202,7 +202,7 @@ impl<const CPU: CpuType> JitAsm<'_, CPU> {
                     }
 
                     let block_offset = block_asm.guest_inst_metadata(self.jit_buf.insts_cycle_counts[inst_index], inst, op1) as u32;
-                    block_asm.mov4(FlagsUpdate_DontCare, Cond::AL, Reg::R12, &block_offset.into());
+                    block_asm.mov2(Reg::R12, &block_offset.into());
 
                     if remaining_op1 == 1 {
                         let usable_reg = USABLE_REGS.peek().unwrap();
@@ -222,7 +222,7 @@ impl<const CPU: CpuType> JitAsm<'_, CPU> {
                     block_asm.restore_guest_regs_ptr();
                 } else {
                     let block_offset = block_asm.guest_inst_metadata(self.jit_buf.insts_cycle_counts[inst_index], inst, op1) as u32;
-                    block_asm.mov4(FlagsUpdate_DontCare, Cond::AL, Reg::R12, &block_offset.into());
+                    block_asm.mov2(Reg::R12, &block_offset.into());
 
                     if remaining_op1 == 1 {
                         let usable_reg = USABLE_REGS.peek().unwrap();
@@ -317,7 +317,7 @@ impl<const CPU: CpuType> JitAsm<'_, CPU> {
         block_asm.nop0();
 
         let block_offset = block_asm.guest_inst_metadata(self.jit_buf.insts_cycle_counts[inst_index], inst, RegReserve::new()) as u32;
-        block_asm.mov4(FlagsUpdate_DontCare, Cond::AL, Reg::R12, &block_offset.into());
+        block_asm.mov2(Reg::R12, &block_offset.into());
 
         let size = if inst.op == Op::Swpb { 1 } else { 4 };
         self.emit_fast_single_transfer(size, false, false, block_asm);
@@ -330,7 +330,7 @@ impl<const CPU: CpuType> JitAsm<'_, CPU> {
 
         let inst = &self.jit_buf.insts[inst_index];
         let block_offset = block_asm.guest_inst_metadata(self.jit_buf.insts_cycle_counts[inst_index], inst, reg_reserve!(Reg::R0)) as u32;
-        block_asm.mov4(FlagsUpdate_DontCare, Cond::AL, Reg::R12, &block_offset.into());
+        block_asm.mov2(Reg::R12, &block_offset.into());
 
         self.emit_fast_single_transfer(size, false, true, block_asm);
         block_asm.nop0();

src/jit/emitter/thumb/emit_branch_thumb.rs

@@ -29,7 +29,7 @@ impl<const CPU: CpuType> JitAsm<'_, CPU> {
         }
 
         let pc_reg = block_asm.get_guest_map(Reg::PC);
-        block_asm.ldr2(pc_reg, target_pc | 1);
+        block_asm.ldr2(pc_reg, target_pc);
 
         let lr_reg = block_asm.get_guest_map(Reg::LR);
         let pc = block_asm.current_pc;

src/jit/jit_memory.rs

@@ -697,7 +697,7 @@ impl JitMemory {
         }
 
         let metadata_entry = arm_context.gp_regs[12];
-        let jit_mem_offset = *host_pc - self.mem.as_mut_ptr() as usize;
+        let jit_mem_offset = *host_pc - 4 - self.mem.as_mut_ptr() as usize;
         let metadata_block_page = jit_mem_offset >> PAGE_SHIFT;
         let thumb = self.guest_inst_metadata[metadata_block_page][metadata_entry].pc & 1 == 1;