Releases: intel/isa-l_crypto
Releases · intel/isa-l_crypto
v2.25.0
Full Changelog: v2.24.0...v2.25.0
API changes:
- Added new API including parameter checking (starting with isal_ prefix).
- Added new API returning the library version.
- Deprecated previous API in favour of new API (more information in https://github.com/intel/isa-l_crypto/wiki/New-API-introduced-from-v2.25).
New FIPS mode:
- Added FIPS mode, including self tests in NIST approved algorithms (more information in https://github.com/intel/isa-l_crypto/blob/master/FIPS.md).
- Added ACVP test applications for AES-CBC, AES-GCM, AES-XTS and SHA1/256/512.
Cipher improvements:
- Optimized AES-GCM for AVX512-VAES x86 implementation.
- New optimized version of AES-CBC and AES-XTS for aarch64.
Hash improvements:
- Optimized MD5 and SM3 for aarch64.
- Optimized multi-hash SHA1-Murmur for aarch64.
- Optimized multi-hash SHA1 for aarch64.
Assembler support
- Removed YASM support, so only NASM assembler is supported for x86.
- Bumped minimum NASM version to 2.14.01, which supports all x86 ISA used in this library.
Resolved Issues
- Fixed build with gcc 11.1.
- Fixed SHA512 internal reference function parameters.
- Fixed SM3 lane handling for aarch64.
- Replaced non-VEX encoded with VEX-encoded instructions in AES-XTS implementation.
- Fixed clang compilation with older assemblers.
- Fixed SHA512 calculation error on aarch64.
- Fixed MD5/SHA1/SHA256/SHA512 base functions for small inputs (less than block size).
- Fixed AES-XTS OpenSSL calls, limiting the input size, as per restrictions in 3.0 version.
- Fixed Windows build on test applications.
- Fixed SHA1 context structure to force alignment for lengths array.